Partitioning and Layout of Mixed-Signal PCBs

Preventing digital logic ground currents from contaminating low-level analog signals on a mixed-signal PCB can be a difficult problem.  This is especially true on boards with multiple ADCs.  Many people suggest splitting the ground plane in order to isolate the digital ground from the analog ground.  Although the split-plane approach can be made to work it has many potential problems.  The pitfalls, as well as the benefits, of splitting ground planes are examined.

By understanding how and where high-frequency ground currents flow, and by using some basic principles of Electromagnetic Compatibility (EMC) we are able to develop an approach to controlling these currents while still maintaining a single contiguous ground plane.

This presentation demonstrates that component placement, partitioning, and proper PCB topology, combined with routing discipline, are the keys to success in laying out a mixed-signal PCB.

Analog voltage distribution, filtering and decoupling are also discussed along with PCB to chassis connections and the effect of parasitics.

The presentation is intended for PCB designers,  engineers, and managers who are involved with the layout of mixed-signal PCBs.


Some Applicable EMC Principles

    Return Currents
    Ground Planes
    Dipole Antenna
    Lowest Impedance Return Current  Path
    Microstrip Ground Current Distribution

The Basic Problem

Required Ground Isolation

    Minimum Signal Level
    A/D Converter Resolution

Methods of Providing Required Isolation

    Problems With Split Ground Planes
    Acceptable Ways to Pass a Signal Across a Split Plane
    PCB Partitioning
    A/D Converter Ground Requirements
    Routing Discipline
    PCB Stack-Up

High Resolution A/D Converters

    A/D or D/A Converter Resolution
    SNR and Dynamic Range
    Required Isolation
    Stripline/ Asymmetrical Stripline Current Distribution
    Revised Topology
    Isolating Analog and Digital Regions
    Plane Isolation Guidelines

A/D & D/A Converters Support Circuitry

    Sampling Clock Jitter
    Voltage References
    Digital I/O Buffers
    Support Circuitry Grounding and Layout
    Multi-board Systems

Secondary Effects

    Circuit Ground to Chassis Connections
    Common-Mode Ground Currents
    Circuit-to-Chassis Ground Connection Dilemma
    Vertical Isolation
    Parasitic Capacitance
    PCB Resonance
    PCB Aspect Ratio

Powering of Mixed-Signal PCBs

    Power Planes
    Power Traces
    Filtering Analog Power

Return to top of page.

Return to HOC home page.

Henry Ott Consultants
48 Baker Road Livingston, NJ 07039
Phone: 973-992-1793,   FAX: 973-533-1442

  January 30, 2007