The Ten Best Ways to Maximize the Emission from Your Product
As an EMC consultant I am not sure that this paper is necessary. Many designers know about and practice these techniques regularly. But as an aid to those of you new to the EMC business (or those who would like a review), I present it to help you quickly become proficient, and be on a par with your more experienced colleagues.
The clock is usually the best place to start maximizing emission. Pick the highest frequency clock and fastest rise time possible. Clock frequencies above 50 MHz, and rise times less than one nanosecond are especially desirable. You can always route a clock around the board at a frequency higher than necessary, then divide the frequency down at the load. When viewed on an oscilloscope, clocks with sub-nanosecond rise times look like ideal square waves (just what your digital guru likes to see), not those wimpy trapezoidal waves produced by slow rise time clocks.
Clock routing is also important. Make sure that the layout is such that the clock trace is as long as possible. Also route it as far away from any ground planes, power planes, and other ground or return traces as possible. When doing component placement on the PCB orient and locate all ICs to maximize the length of the clock runs. Routing clocks along the edge of the PCB and near or through the I/O area is also very desirable.
Make sure that you have plenty of slots in your ground and power planes. The extra copper removed will decrease the weight of your PCBs, as well as forcing the logic return currents to flow through a longer path (to get around the slots), thereby increasing the impedance of the ground plane. The increased ground impedance will increase the ground voltage that excites the cables connected to the board thereby increasing their radiation.
If you have isolated ground planes (e.g., analog ground and digital ground) make sure that you route a lot of high frequency clock traces (or other high frequency signals) across the slot between the planes. This will force the ground return currents to flow in big loops in order to find a return path. If you do a really good job of this you can force the return currents to flow all the way back to the power supply ground terminal where you have provided the only single point connection between the two ground planes.
In order to provide high frequency decoupling for your digital logic ICs; place a single 0.1 uF capacitor (a 0.01 uF capacitor will do if you run out of 0.1 uF capacitors) somewhere in the vicinity of the IC. This is the same decoupling method that has been used on digital logic ICs for the last forty plus years, so it must still be the correct approach. After all, how much has IC technology changed in the last forty years? Of course if low cost is an objective of the design you could leave the capacitors off completely, or use one capacitor for every three to five ICs. What ever you do, don't use more than one capacitor per IC. After all multiple capacitors (two to twenty per IC) are expensive and take up additional board space.
Unshielded I/O cables should not have any common-mode filters or ferrite chokes on them. If you do use filters, make sure that the PCB layout maximizes the parasitics ------ the capacitance across a series element and the inductance in series with a shunt element. Also locate the filter far away from where the cable enters or leaves the enclosure. This way the I/O cable can pass through the filter then be routed through the high frequency logic on the board before exiting the enclosure.
If shielded cables are used on the I/O signals, terminate the cable shield using a long pigtail. A three or four inch pigtail is probably sufficient, but six to eight inches will be even more effective. One especially effective method is to connect a pigtail on the external cable shield and connect it to a pin of the connector. Then you can use a long pigtail connected to the connector pin inside the product to make the ground connection. Better yet don't terminate the cable shield at all. This last approach will also reduce the manufacturing costs of the product.